Digital Level Shifter

This article contains Verilog-A model for a digital Level Shifter.

Table of Contents

  1. Level-shifter without inversion (same as clk)
  2. Level-shifter with inversion

Usage:

  1. Create a new cell in Library Manager named level_shifter and select cell type Verilog A;
  2. Copy and paste the code provided;
  3. Specify input_swing variable to be the output swing;
  4. Specify t_edge and t_delay variables to be the rising/falling time and delay of the output waveform;
  5. Perform Check and Save;
  6. A cell symbol will be created;
  7. Instantiate level_shifter cell into your design;
  8. Perform Check and Save and run the simulation.

Cell name: level_shifter

Model type: Verilog-A

1    
2// Digital level shifter (without inversion)
3// Takes differential input - connect your signal to inp, reference to inn
4// Output will be level-shifted to the "low" and "high" levels
5// Author: A. Sidun
6// Source: AnalogHub.ie
7
8`include "constants.vams"
9`include "disciplines.vams"
10
11module level_shifter (inp, inn, outn, outp, low, high);
12    input inp, inn, low, high;
13    output outp, outn;
14    electrical inp, inn, outp, outn, low, high;
15	integer d_outp, d_outn;             // logic output state
16
17   	parameter real input_swing = 5.0;   // define input singnal swing
18	parameter real t_edge = 1e-9;
19	parameter real t_delay = 1e-9;
20
21analog begin
22@(initial_step) begin
23    d_outp = 0;
24    d_outn = 1;
25    end
26
27@(cross(V(inp)-V(inn) - 0.5*input_swing,0)) begin
28    if (V(inp)-V(inn)>0.5*input_swing) begin
29        d_outp = 1;
30        d_outn = 0;
31    end
32    else begin
33        d_outp = 0;
34        d_outn = 1;
35end // end if
36
37end // end cross
38
39V(outp) <+ V(high)*transition(d_outp,t_delay,t_edge) + V(low)*transition(d_outn,t_delay,t_edge);
40V(outn) <+ V(high)*transition(d_outn,t_delay,t_edge) + V(low)*transition(d_outp,t_delay,t_edge);
41
42end //analog begin
43endmodule

Cell name: level_shifter_inv

Model type: Verilog-A

1  
2// Level shifter with inversion (digital)
3// Author: A. Sidun
4// Source: AnalogHub.ie
5
6`include "constants.vams"
7`include "disciplines.vams"
8
9module level_shifter_inv (inp, inn, outn, outp, low, high);
10    input inp, inn, low, high; 
11    output outp, outn;
12    electrical inp, inn, outp, outn, low, high;
13    parameter real VDD = 5.0; // Output voltage during high state
14
15analog begin
16
17@(initial_step)
18	V(outp) <+ V(high);
19	V(outn) <+ V(low);
20
21 	if ((V(inp)-V(inn)) > VDD/2) begin
22		V(outp) <+ V(high);
23		V(outn) <+ V(low);
24	end 
25
26	if ((V(inp)-V(inn)) < VDD/2) begin
27		V(outp) <+ V(low);
28		V(outn) <+ V(high);
29	end 
30end
31
32endmodule