Decimal to Thermometer Encoder
This article contains Verilog-A model for Decimal to Thermometer encoder. This block can be used for behavioral simulation of the pipelined ADCs, programmable gains/BW etc. This model will automatically select number of outputs based on selected number of input binary bits. Usage:
- Create a new cell in Library Manager named dec2therm and select cell type Verilog A;
- Copy and paste the code provided;
- Specify therm_bits variable to be the desired thermometer bits number;
- Specify Start_Bit to be 0 if you want thermometer code to start from 0 or 1 if you want thermometer code to start from 1;
- Perform Check and Save;
- A cell symbol will be created;
- Instantiate dec2term cell into your design;
- Perform Check and Save and run the simulation.
Example: therm_bits = 4, Start_Bit = 0
| Decimal input | Thermometer code |
|---|---|
| 0 | 0000 |
| 1 | 0001 |
| 2 | 0010 |
| 3 | 0100 |
Example: therm_bits = 4, Start_Bit = 1
| Decimal input | Thermometer code |
|---|---|
| 0 | 0001 |
| 1 | 0010 |
| 2 | 0100 |
| 2 | 1000 |
Cell name: dec2term
Model type: Verilog-A
1// Decimal to Thermometer decoder
2// Implements two options:
3// Start_Bit = 0: Decimal 0 equals thermometer 0
4// Start_Bit = 1: Decimal 0 equals thermometer 1
5// Change therm_bits variable for your needs!
6// Author: A. Sidun
7// Source: AnalogHub.ie
8
9\`include "constants.vams"
10\`include "disciplines.vams"
11\`define therm_bits 10\t\t\t\t\t\t// define number of output bits here
12
13module dec2therm(out);
14
15output [\`therm_bits-1:0] out;
16voltage [\`therm_bits-1:0] out;
17
18parameter real vdd = 5;\t\t\t\t\t// voltage level of logic 1 (V)
19parameter real vss = 0;\t\t\t\t\t// voltage level of logic 0 (V)
20parameter integer Decimal_Code = 5; \t// input decimal code
21parameter integer Start_Bit = 0; \t// defines if thermometer starts from 0 or 1
22
23real dout[\`therm_bits-1:0];\t\t\t\t\t// internal result variable
24genvar i;
25
26analog begin
27
28case (Start_Bit)
29 0: begin\t// Decimal 0 equals thermometer 0
30\t\tfor(i=1;i<\`therm_bits+1;i=i+1) begin
31 \t\tif(Decimal_Code!=i) begin
32 \t\tdout[i-1]=vss;
33 \t\tend
34 \t\telse begin
35 \t\tdout[i-1]=vdd;
36 \t\tend
37\t\tend
38\tend
39
40 1: begin\t// Decimal 0 equals thermometer 1
41\t\tfor(i=0;i<\`therm_bits;i=i+1) begin
42 \t\tif(Decimal_Code!=i) begin
43 \t\tdout[i]=vss;
44 \t\tend
45 \t\telse begin
46 \t\tdout[i]=vdd;
47 \t\tend
48\t\tend
49\tend
50endcase
51
52// Plotting outputs
53for (i=0; i<\`therm_bits; i=i+1)
54\t V(out[i]) <+ transition(dout[i],0,0);
55end
56
57endmodule